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3T - Innovation in Tic-Tac-Toe

December 1st, 2001

Using VLSI design and cutting-edge 0.5 micron CMOS microchips to do what any pre-schooler would know how to do already.

Think you know Tic-Tac-Toe? Think again.

See it here, and here.

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3 comments for “3T - Innovation in Tic-Tac-Toe”

  1. OK Paul, I don’t get why Tic-Tac-Toe would make a “thought-ful” processor design. Isn’t TTT a small enough solution-space that it becomes a completely determininistic system? I mean theoretically there are 9!=363880 possible moves but isn’t there a much smaller set of general patterns?

  2. Yes, it could have simply been implemented in a sufficiently large ROM, but by having the computer play “live” it greatly reduced the amount of data that needed to be stored - especially since we built in three different difficulty settings - because I think the project chip was quite limited in useable area. The way we implemented it, only the “hard” setting is scripted to make offensive moves, while “easy” and “normal” use varying degrees of defensive moves and just hope you slip up.

    Plus, designing it this way makes the project more interesting :-)

  3. Heh, makes sense… I forgot about the three levels of difficulty too. Looking at the designs I can see the physical limitations.

    It’s a good thing you used two-phase non-overlapping clocking rather than edge-triggered flip-flops (without extensive spice-level simulation). I often forget to do that when I’m running late for work.

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